Get in Touch

Course Outline

Origins of the RISC-V architecture. Definition of the modular architecture, encompassing base architectures and extensions. The RISC-V ISA, including registers and the instruction set. Features aligned with contemporary software concepts. An overview of various RISC-V implementations.
RISC-V system architecture. Exceptions and their management. The CLIC interrupt controller. The ECLIC interrupt controller within the GD32VF103.

Practical Exercises:
1. Firmware development for the GD32VF103 using VScode.
2. Managing interrupts on the GD32VF103.

Requirements

A fundamental understanding of the C language is required.

 7 Hours

Testimonials (1)

Related Categories